Date of Award

6-7-2023

Document Type

Thesis - SCU Access Only

Publisher

Santa Clara : Santa Clara University, 2023.

Department

Electrical and Computer Engineering

First Advisor

Hoeseok Yang

Abstract

In the modern era, audio recognition devices are widespread and abundant, however, the vast majority are power hungry, connected to the cloud, and are rarely battery powerable. In this paper, we create our own dynamic frequency scaling (DFS) algorithm that is implementable on microcontrollers (MCU) which allows us to utilize weight clustering optimization algorithms, NN layer pruning and removal, and quantization to effectively optimize audio recognition neural networks (NN) on MCUs for power consumption while maintaining reasonable accuracy and inference speed. We tested a variety of different optimization techniques and combinations of techniques on top of our custom DFS algorithm running on an MCU. We found that the most effective optimization strategy entailed layer removal to a certain degree, combined with layer pruning, and weight clustering. We noticed that quantization had little to no effect on the evaluation metrics which we decided to focus on, and found that layer removal was the most effective in realizing the lower power consumption. Furthermore, by utilizing our DFS algorithm, other NN optimization strategies or changes such as NN weight pruning algorithms, alterations in the datasets, and other methods can be employed to realize more efficient and different power consumption optimizations on microcontrollers.

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