A Bipolar Load CMOS SRAM Cell for Embedded Applications
Document Type
Article
Publication Date
5-1995
Publisher
IEEE
Abstract
This paper presents a new SRAM cell concept which offers cell scaling without requiring complicated, specialized processing technology. The proposed cell utilizes a bipolar transistor in an open-base (base is floating) configuration as a simple means of realizing a high impedance load element. The Bipolar Transistor Load (BTL) is designed such that its open base current (the holding current) is always large enough to compensate for the NMOS pull-down transistor leakage current. The load holding current and the pull-down transistor leakage current are based on the same physical mechanism, namely thermal generation, as a result the load exhibits current tracking properties over varying process and temperature conditions. The cell size is 72 μm 2 with typical 0.8 μm design rules, which is about a 60% reduction as compared to a standard 6-T full CMOS cell. The operating properties of the BTL cell were studied analytically and characterized experimentally. The BTL SRAM module can be easily integrated as part of any CMOS process with minimal additional processing steps.
Recommended Citation
A.S. Shubat, R. Kazerounian, R. Irani, A. Roy, G.A. Rezvani, B. Eitan, and C.Y. Yang, “A Bipolar Load CMOS SRAM Cell for Embedded Applications,” IEEE Electron Device Letters 16, 169-171 (1995).
