Date of Award


Document Type



Santa Clara : Santa Clara University, 2020.


Electrical Engineering

First Advisor

Fatemeh Tehranipoor


As we venture further into the 21st century, it becomes much clearer that hardware security is at the forefront of many challenges that we face today in ensuring that data is protected. “Keys” (a sequence of bits) can be used to unlock pieces of data and is a concept that is pervasive throughout cryptography, but storage in memory makes this sole method nonviable. To make the approach more practical, one can dynamically generate a key through a Physical Unclonable Function (PUF). PUFs are circuit primitives that use intrinsic variations of microchips created during the manufacturing process to generate a unique “fingerprint” for each chip. We simulated several different PUF designs on a Field Programmable Gate Array (FPGA) board to determine how changes to a starting design can affect the reliability, randomness, and uniqueness of these IDs. We propose two schemes, a parallel and a serial scheme for a ring oscillator (RO) based PUF. The parallel scheme is a useful benchmark for other designs, and the serial scheme uses much less hardware than other RO PUF designs. The serial scheme is not as random, reliable, or unique as the parallel scheme, but it creates input-output pairs with much less area.