Beating the Heat – Improving CMOS Hot-Carrier Reliability through Analysis, Modeling, and Simulation
CMOS hot-carrier reliability at both transistor and circuit levels has been examined. Accurate reliability assessment requires defining suitable criteria for acceptable performance for both circuit and individual transistors. As device designers meet demands for greater speed and more complex circuitry accompanied by shrinking the size of transistor into the deep-submicron regime, they have to contend with increase in current densities and higher electric fields. Though in general a MOSFET's driving capability increases as the channel length decreases, the resulting high field will eventually limit the driving capability of the device. The authors discuss improving CMOS hot-carrier reliability through analysis, modelling and simulation.
D.S. Sugiharto, C.Y. Yang, H. Le, and J.E. Chung, “Beating the Heat – Improving CMOS Hot-Carrier Reliability through Analysis, Modeling, and Simulation,” IEEE Circuits and Devices Magazine 14, No.5, 43-51 (1998).