Date of Award

Spring 2024

Document Type

Thesis

Publisher

Santa Clara : Santa Clara University, 2024

Department

Electrical and Computer Engineering

First Advisor

Hoeseok Yang

Abstract

Zero-Knowledge Succinct Non-interactive Argument of Knowledge (zk-SNARK) is an important security verification protocol in cryptography. However, zk-SNARK is a computationally expensive protocol in software, meaning that it takes a lot of time. In this paper, we focus on how we can increase the efficiency of the zk-SNARK protocol. The zk-SNARK protocol comprises of many algorithms put together. Our project focuses on optimizing one specific algorithm within the zk-SNARK protocol, the Number Theoretic Transform (NTT). We developed a hardware implementation of the NTT on a Field Programmable Gate Array (FPGA) board. To ensure the proper execution of the hardware, an external processor was used to ensure that data was being sent and received to and from the hardware at the correct time. This resulted in an hardware software co-design implementation of the NTT. Our experiment results showed that our hardware-accelerated NTT was 50 times more efficient than a software implementation of the NTT. Our optimization of the NTT through hardware means that the zk-SNARK protocol will take less time to execute leading to an improvement in efficiency. Consequently, improvements beyond our NTT hardware accelerator will make an impact in the zk-SNARK protocol. Developing multiple NTT hardware blocks in parallel or optimizing other algorithms within the zk-SNARK protocol will lead to further improvements in the efficiency of the zk-SNARK verification protocol.

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