Date of Award
Santa Clara : Santa Clara University, 2017.
An integrated circuit (IC) consists of copper (Cu) and tungsten (W) interconnects to facilitate conduction among its components such as transistors, resistors, and capacitors. As the minimum feature size in IC technology continues to scale downward into the sub-20 nm regime, interconnects are faced with performance and reliability challenges arising from increased resistance and electromigration, respectively . To partially mitigate such challenges, our project aims at studying a structure as a potential replacement for Cu and W, formed by growing carbon nanotubes (CNTs) directly onto graphene, and investigating the resulting electrical and interfacial properties. Various CNT/Graphene structures are fabricated using sputtered iron (Fe), cobalt (Co), or nickel (Ni) catalyst films and subsequent thermal chemical vapor deposition (CVD) or plasma-enhanced chemical vapor deposition (PECVD) processes for CNT growth. The objective of this research is to assess the viability of CNTs directly grown on graphene as a functional alternative to Cu and W interconnects in integrated circuits. Using Co as a catalyst for CNT growth with a thermal CVD process, we have succeeded in creating a conductive all-carbon 3D interconnect structure.
Senegor, Richard and Baron, Zachary, "Carbon nanotubes on graphene: Electrical and interfacial properties" (2017). Electrical Engineering Senior Theses. 33.