Low Temperature Electrical Characteristics of the Au/Si Interface

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An investigation has been conducted on the irregular electrical behavior of eutectic and polyimide die-attached NMOS devices at low temperatures. The nature of the Au/Si interface on the back side of each die is the focus of this study. A test structure consisting of alloyed gold films on both sides of the wafer was fabricated. Models of the structure were proposed to explain the observed low-temperature behavior. The Au/Si interface was assumed to be a Schottky junction. This assumption was confirmed in conjunction with measurements on another test structure which consists of Au on the back side and Al on the front side. It had been suspected that contamination introduced from the eutectic die-attach materials was solely responsible for the observed behavior. However, tests conducted on heat-treated polyimide die-attached NMOS devices produced similar observation. Solutions to the problem were discussed and a simple technique to eliminate the rectifying behavior of Au/p-Si contacts was described.